Digital Hardware Design Engineer Resume

Desired Industry: Computer Hardware	SpiderID: 5503
Desired Job Location: Logan, Utah	Date Posted: 2/20/2006
Type of Position: Full-Time Permanent	Availability Date: ASAP
Desired Wage: 50000
	U.S. Work Authorization: Yes
Job Level: New Grad/Entry Level	Willing to Travel: Yes, More Than 75%
Highest Degree Attained: Masters	Willing to Relocate: Yes

Objective:
Objective: To obtain a challenging job in the area of Digital Hardware Design and Firmware Development that provides opportunities to use my skills and experience.

Experience:
• Research Assistant (Spring 2005 –Fall 2005)-Reconfigurable Computing Labs.
Worked with Dr.Aravind Dasu on hybrid FPGA based architectures and Distributed Spatio-Temporal Computing Systems.
• Junior Programmer (Spring 2003 –Summer 2004)-Space Dynamics Laboratory.
Worked on MPI based parallel cluster computation for massively large arrays on a CRAY XD1 supercomputer of Pittsburg Supercomputing Centre (PSC). (Project funded by NASA and NSF.).
• Signal Processing Engineer (Summer 2005)-Speech Development Laboratory, USU.
Implemented Multi Channel Cochlear Implant Simulators, Noise-Band Vocoders and a Sine Wave Synthesizer for real time audio in MATLAB.
• Hardware Engineer. (June-2003 –December2003)- HCL Technologies, India
Wrote behavioral code, thorough simulation of the code using Modeltech simulation testing overall functionality of the designed system; synthesized the system using a library of standard cells ,placed and routed the system on a silicon chip, subjected the design to timing analysis using Cadence Encounter.
• Student Intern (Summer 2002)- Bharat Heavy Electricals Limited Bangalore.
Worked on programming microcontrollers for EMU traction units.

Education:
MS -Electrical & Computer Engineering (2004–2005)-Utah State University, Logan, Utah GPA: 3.69
BS- Electronics & Communication (1999-2003)-University of Madras, India GPA: 3.7

Skills:
Programming languages: C, C++, Java, Perl, FORTRAN 95, MATLAB, COBOL, HTML, Visual Basic, 8085 Assembly Language;
Hardware Description Languages: Verilog , Handel C, VHDL.
VLSI/CAD Tools: Cadence SOC, Modelsim, Cadence Encounter, Cadence Schematic Design ,ISP Lever, Build-Gates Extreme synthesis tool, TI Code Composer Studio, T-Spice, L-Edit, S-Edit, LVS, DRC, Silicon Ensemble.
FPGA Design Tools: Xilinx ISE, VIVA
RTOS: uCOS-II, VxWorks,
Operating systems: Windows NT/9x/XP, LINUX, Solaris, Windows Server 2003 IBM Z/OS.
DBMS: SQL Server, DB2, MS ACCESS.
Networking: TCP/IP, Exchange Server, Active Directory, Proxy Server, IIS 6.0, Firewalls, Anti-Virus, DNS, DHCP, VPN, CISCO hardware, LAN.

Reference:
Available on Request

Candidate Contact Information:

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