Pre-silicon Analog Validation Engineer (via simulation) - Engineering
Pre-silicon Analog Validation Engineer (via simulation) - Engineering
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Pre-silicon Analog Validation Engineer (via simulation) Resume


Desired Industry: Engineering SpiderID: 29342
Desired Job Location: Phoenix, Arizona Date Posted: 10/28/2009
Type of Position: Full-Time Permanent Availability Date: 09 November 2009
Desired Wage: 60000
U.S. Work Authorization: Yes
Job Level: Experienced with over 2 years experience Willing to Travel: Yes, Less Than 25%
Highest Degree Attained: Masters Willing to Relocate: No


Objective:

1. Pre-silicon Analog Validation Engineer – Simulation of integrated circuitry designed by others (e.g., I/Os, references, over-voltage/under-voltage detection blocks, high-side/low-side drivers, A-to-D & D-to-A converters, amplifiers, regulators, etc.). This would include combinations of high/low supply vs. high/low temp vs. process variation, vs. loading, etc. Simulation evaluations would also include (where applicable) response to power supply ramp conditions, imposed slew rate events at inputs/outputs, anomalous ground behavior, and ESD events. Statistical analyses (mismatching, etc.) would also be provided (tool sets permitting).

2. Some in-house responsibility for teaching basic circuit theory. For an example of what would be taught (and teaching style), please see www.lccircuits.com (I am the owner/developer/editor).



Experience:

Motorola/Freescale IC Design Engineer
(Summer 1982 - May 2009)
Analog integrated circuit design [as a team member, or as a team leader, etc., with various design groups & product types (interface, disk drive, imaging, automotive)]. Developed an in-house training tutorial that provided some one-on-one & group training opportunities, etc.

Laid off in March 2009; remained on the payroll through the end of May 2009

Motorola IC Product Engineer
(Summer 1973 - Summer 1982)
Coordinated production activities (Probe, Final Test, etc.) for various Linear Interface ICs, then certain military product ICs.

Motorola Engineering Trainee
(June 1972 -- Summer 1973)
Four 3-month rotations

BYU Computer Programmer
(Summer 1971 – Spring 1972)
Used FORTRAN to develop a model for water quality in Utah Lake (this was
graduate work for the Civil Engineering department)

BYU Paper Grader
(1971)
Two semesters of an EE class in switching, timing, and pulse circuits


Education:

MS (EE) May 1987, Arizona State University
BS (EE) August 1971, Brigham Young University


Affiliations:

Tau Beta Pi


Skills:

PC, Linux, Cadence


Candidate Contact Information:
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