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Digital Design Engineer / Mixed Signal IC Design / RFIC Design Resume
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| Desired Industry: Computer Hardware |
SpiderID: 1860 |
| Desired Job Location: San Diego, California |
Date Posted: 2/8/2005 |
| Type of Position: Full-Time Permanent |
Availability Date: |
| Desired Wage: |
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U.S. Work Authorization: |
| Job Level: New Grad/Entry Level |
Willing to Travel: |
| Highest Degree Attained: |
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Objective:
O B J EC T I V E & Q U A L I F I C A T I O N S
OBJECTIVE: Position in IC Design Engineering with a special interest in Digital Design / Mixed Signal Design
QUALIFICATIONS: Well rounded skills, strong conceptual knowledge that complements the skill-set
-Research experience in HDL-level design and synthesis of FPGAs
-In-depth knowledge of timing and circuit analysis concepts
-Hands-on experience with CAD tools including CADENCE, SPICE, ADS, Synopsys, Xilinx tools
-Ability to identify, analyze, and solve complex problems, in both individual and team settings
-Well demonstrated communication skill, keen acumen, strong analytical ability
-High motivation levels, honesty, integrity and strong work ethics
Experience:
A D V A N C E D A C A D E M I C E X P E R I E N C E
Graduate Research Assistant, Virginia Tech, Blacksburg, Summer 2002 - Current
-Developing a new hardware simulation technique using FPGAs, to provide a million-time speed increase for researchers modeling thermal phenomena coupled with other multi-physical processes
-New methodology based on the cellular automata approach and FPGA simulation techniques is being employed
-Time-area trade-offs, resulting from the use of various adder and multiplier architectures, are being studied
S I G N I F I C A N T D E S I G N P R O J E C T S
VLSI DESIGN
-16-bit ALU design: Designed a 16-bit ALU and control unit for fabrication in MOSIS AMI
1.5 micron process using Cadence and SPICE
-Study of inverter characteristics: Designed and analyzed the characteristics of various inverter designs based on W/L ratio, noise margins, rise time, fall time, and parasitic components
-Cell Matrix array: Constructed a Cell Matrix array using Silicon Ensemble
-Placement and Routing: Developed placement and routing strategies for a chip assembly process using IC_Craftsman
RFIC DESIGN
-X-band Low Noise Amplifier: Designed an X-band low noise amplifier for fabrication in Motorola’s HiP6WRF low-voltage 0.18 micron Si/SiGe BiCMOS process using the Cadence design suite
DIGITAL DESIGN
-Router-on-a-chip modeling: Developed a system–level model of the router backplane using Ptolemy II and implemented priority-based scheduling
-Digital system modeling using Ptolemy II: Designed and implemented 1`s counter, process networks, and Sobel edge detection algorithm using Ptolemy II and System C
-FIR filter Control: Designed a 3-tap FIR filter component controlled by a Moore type Finite State Machine controller, using VHDL package
-Design of IIR filter: Synthesized FPGA design of a low pass IIR filter using Xilinx WebPack and Synplify, tested the chip for an impulse response, simulated the filter using CODEC interface and used SDRAM control to store and output the filter response
Education:
E D U C A T I O N
Virginia Tech, Blacksburg, VA, Fall 2001 - January 2005
Master of Science in Electrical Engineering (CGPA: 3.2/4.0)
University of Madras, Chennai, India, Fall 1997 - Summer 2001
Bachelor degree in Electrical and Electronics Engineering
Secured First class with distinction (CGPA: 3.8/4.0)
R E L E V A N T C O U R S E S
RFIC Design, Advanced VLSI Design, Design of Systems on a Chip, VLSI Circuit Design, Memory Design, Digital Design, Electronic Devices, Analog & Digital Communication, DSP & Filter Design
Skills:
S K I L L S E T
CAD TOOLS: Cadence, SPICE, ADS, Synopsys, Workview 7.5,
Xilinx WebPack 4.1, Xilinx FPGA Editor 4.1,
Synplify 7.0, Ptolemy II
HDLS: VHDL, Verilog HDL, System C
SOFTWARE PACKAGES: MS Office XP, MATLAB
WEB DEVELOPMENT TOOLS: Dreamweaver MX, Flash MX, MS Frontpage 2002
PROGRAMMING LANGUAGES: C, Pascal and FORTRAN 77
PLATFORMS: Windows (9x, 2000, NT, XP), UNIX, Linux
Additional Information:
T E C H N I C A L P R E S E N T A T I O N
A SiGe Low Noise Amplifier for X Band Applications, September 2003
-Project presentation at the Wireless Opportunities Workshop conducted by Center for Wireless Telecommunications, Virginia Tech
Reference:
H O N O R S / A W A R D S
- Received a Certificate of Appreciation for the best design project from undergraduate college – 2001, India
- Received a Certificate of Merit for academic proficiency in undergraduate degree – 2001, India
W O R K E X P E R I E N C E
Computer Network Specialist, Dept. of Animal and Poultry Sciences, Virginia Tech, Aug 2003 – Dec 2003
-Designed a website for the Virginia Tech Post-Baccalaureate Research and Education Program using Dreamweaver MX, Flash MX and MS Frontpage
-Primarily responsible for network-related issues within the department
Engineering Intern, Sundaram Clayton Ltd, India, Jan 2001 – June 2001
-Effectively teamed up with senior engineers and conducted product research (Hands-on experience)
-Customized PLCs (Programmable Logic Controllers) deployed in process control equipments, according to customer specifications
O T H E R I N T E R E S T S
-Participating in online discussion forums related to VHDL, VLSI and RFIC design concepts
-Reading books, creating recipes, traveling, watching scientific and historical documentaries
Candidate Contact Information:
| Name: Rama Rajan |
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Phone: 713-202-9431 |
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